Circuit and method for restoring digital clock signal

Application Number: 00107010
Application Date: 2000.04.24
Publication Number: 1275835
Publication Date: 2000.12.06
Priority Information: 1999/5/26 KR 19020/99
International: G11B20/10;H03L7/00
Applicant(s) Name: Samsung Electronics Co., Ltd.
Address:
Inventor(s) Name: Park Hyon-Soo;Shim Jae-Seung;Won Bang-Kwang
Patent Agency Code: 11105
Patent Agent: sun lubeng
Abstract A circuit for recovering a digital clock signal and a method therefor is disclosed. The digital clock recovery circuit includes an analog-to-digital (A/D) converter and asymmetry corrector for converting a received analog signal into digital data and providing corrected digital data corrected by a binarization level which traces the center value of the received signal, a frequency error detector for detecting a frequency error from the corrected digital data, a phase error detector for detecting a phase error from the corrected digital data, and a digital low pass filter (LPF) for providing the frequency error and the phase error as a control voltage. It is possible to trace the asymmetry of the received signal more sensitively than in the conventional technology by realizing an asymmetry corrector for correcting the asymmetry of the digital data which has undergone the analog-to-digital (A/D) conversion, the phase error detector, and the LPF by a digital circuit, thus generating a system clock signal and to improve the reliability of the system by stably generating the system clock signal.