Device and method for generating sparse interference graph

Application Number: 00107016
Application Date: 2000.04.24
Publication Number: 1271894
Publication Date: 2000.11.01
Priority Information: 1999/4/23 US 09/298115
International: G06F9/50
Applicant(s) Name: Sun Microsystems, Inc.
Address:
Inventor(s) Name: C. N. Kerlek;Jr.;C. A. Vick;M. H. Paretzny
Patent Agency Code: 72001
Patent Agent: wu limeng
Abstract Methods and apparatus for reducing the number of edges described by an interference graph are disclosed. According to one aspect of the present invention, a computer-implemented method for allocating memory space in an object-based computing system includes obtaining source code that includes a code segment associated with a first variable and a code segment associated with a second variable. The method also includes binding the first variable to a specific register, and obtaining a live range for the second variable. Once the live range for the second variable is obtained, a register allocation is performed. Performing the register allocation includes creating an interference graph that includes a representation of the second variable and does not to include a representation of the first variable.

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