Exposure mask, its manufacturing method and making method of semiconductor device using same


Application Number  00129284 Application Date  2000.09.30
Publication Number  1293449 Publication Date  2001.05.02
Priority Information   1999/9/30 JP 280499/1999  
International
Classification
 G03F1/16;H01L21/027  
Applicant(s) Name  K.K. Toshiba  
Address    
Inventor(s) Name  Esaki Mizusen  
Patent Agency Code  11038 Patent Agent  wang sibeng
AbstractA mask of certain type has a transparent base and a transparent film formed on the transparent base. The transparent film has at least one mask member formed in a predetermined mask pattern and having a relatively low exposure beam transparency. The mask member sometimes has a placement error from a designed placement. This is mainly because an in-plane stress distribution of the transparent film is nonuniformity. The transparent film is partially decreased in thickness to unity the in-plane stress distribution.