Non volatile semi conductor memory device and its manufacturing method

Application Number: 00107076
Application Date: 2000.04.27
Publication Number: 1271963
Publication Date: 2000.11.01
Priority Information: 1999/4/27 JP 119848/1999
International: H01L21/82;H01L27/115;H01L29/788
Applicant(s) Name: Toshiba K. K.
Address:
Inventor(s) Name: Kabeya eiji;Kiyomizu Kazuhiro
Patent Agency Code: 11038
Patent Agent: wang yonggang
Abstract It is difficult to control the etching of the floating gate. In each memory cell MC, a gate oxide film 12 is formed on the surface of a semiconductor substrate 11. A first floating gate 13a comprising a floating gate FG is formed on the gate oxide film 12, an insulating film 14 is formed on the floating gate 13a, and a second floating gate 13b is formed on the insulating film 14, wherein the insulating film 14 functions as an etching stopper, when the second floating gate 13b of polysilicon is etched.

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