Nonvolatile semi-conductor storage and its producing method

Application Number: 00106967
Application Date: 2000.04.26
Publication Number: 1277460
Publication Date: 2000.12.20
Priority Information: 1999/4/26 JP 118115/1999
International: H01L21/82;H01L27/115
Applicant(s) Name: Toshiba K. K.
Inventor(s) Name: Aita Akira;Shirata Riichiro;Kiyomizu Kazuyutaka
Patent Agency Code: 11038
Patent Agent: wang yonggang
Abstract After oxidation amount and an annealing condition can be optimized, even if transistors are different from each other in the gate length in an EEPROM composed of a cell transistor and peripheral transistors formed on the same substrate. For example, the gate of a cell transistor ST-side part which is shorter in length than that of the gate electrode 41 of a peripheral transistor CT is covered with a first insulating film 37 and annealed in an oxidizing atmosphere. In this case, the source and drain diffused layer, 42 and 43, of the peripheral transistor CT are grown sufficiently long to overlap with the gate electrode 41. In addition, the cell transistor ST- side is restrained in progress of oxidation, and an increase in the amount of a bird's beak due to oxidation and the short channel effect induced by excess diffusion of impurities can be restrained.