Redundant circuit of semicnductor memory


Application Number: 00108602
Application Date: 2000.03.17
Publication Number: 1269582
Publication Date: 2000.10.11
Priority Information: 1999/3/18 JP 074040/1999
International: G11C11/34;G11C5/00
Applicant(s) Name: Toshiba Co., Ltd.
Address:
Inventor(s) Name: Negai Ken
Patent Agency Code: 11038
Patent Agent: yu jing
Abstract A semiconductor has eight banks that can be accessed simultaneously. Within each bank, there are disposed two fixed spare row decoders and two mapping spare row decoders. Within each bank, two fixed fuse sets are provided corresponding to the fixed spare row decoders. Eight mapping fuse sets are provided at the outside of each bank, for example, with no association with the mapping spare row decoders. Each mapping fuse set stores mapping data for determining a correspondence of the mapping fuse set to a specific mapping spare row decoder within a specific bank.