Semi-conductor integrated circuit with measurable component block


Application Number: 00108564
Application Date: 1995.08.28
Publication Number: 1277361
Publication Date: 2000.12.20
Priority Information: 1994/8/29 JP 203842/1994; 1994/10/17 JP 250535/1994
International: G01R31/28;G06F11/267;G01R31/3185
Applicant(s) Name: Matsushita Electric Industrial Co., Ltd.
Address:
Inventor(s) Name: Motohara Akira;Takeoka Sadami;Kishi Tetsuji
Patent Agency Code: 11038
Patent Agent: wang sibeng
Abstract Three blocks cascaded to one another in an LSI, namely, an input module, a macro module and an output module, are independently tested. A first test circuit is formed with a first multiplexer interposed between the macro module and the output module, and a second multiplexer and a first control register interposed between the input module and the macro module. A second test circuit is similarly formed with third and fourth multiplexers and a second control register. A test input signal of a plurality of bits is supplied to the first multiplexer, and a latched signal of the first control register is supplied to the third multiplexer, thereby allowing a latched signal of the second control register to be output as a test output signal for observation.