Semiconductive device design method and apparatus, memory medium stored marco-information


Application Number: 00109360
Application Date: 2000.05.30
Publication Number: 1275803
Publication Date: 2000.12.06
Priority Information: 1999/5/31 JP 153057/99
International: G06F17/50;H01L21/82
Applicant(s) Name: NEC Corp.
Address:
Inventor(s) Name: Matsusawa Masao
Patent Agency Code: 11219
Patent Agent: mu dejun
Abstract According to a semiconductor device designing method of the present invention, a single-chip microprocessor with an A/D (analog-to-digital) converter is designed and laid out using a hard macro of the main body of the A/D converter (A) with address-fixed pads and a soft macro of the analog signal input circuit (B). The main body of the A/D converter is made up of fixed address pads (a2 to a4), a reference voltage generator b3, and a comparison/con version circuit b4, whereas the analog signal input circuit (B) is made up of multiple input circuits (Ch0 to Ch11), each being made up of a protection circuit b5, a switch, and a piece of magnetic field shielding material. Each of the input circuits (Ch0 to Ch11) is represented by a hard macro. The soft macro includes interconnective information among the input circuits (Ch0 to Ch11). The layout of the hard macro including the pads (a2 to a4) and the main body of the A/D converter (a1) is first fixed. Then each input circuit (Ch0 to Ch11) is laid out near corresponding pads (a5 to a16).