Semiconductor memory for reducing current loss when keeping data mode


Application Number: 00108974
Application Date: 2000.05.23
Publication Number: 1283853
Publication Date: 2001.02.14
Priority Information: 1999/8/5 JP 222605/99
International: G11C11/407;H01L27/108
Applicant(s) Name: Mitsubishi Electric Corp.
Address:
Inventor(s) Name: Hitaka Hideto
Patent Agency Code: 72001
Patent Agent: yang kai
Abstract A power supply circuit (22c) generating a power supply voltage for refresh-related circuitry (14a) and a power supply circuit (22b) for column-related/peripheral control circuitry (14b) are controlled by a power supply control circuit (25) to be put in different power supply voltage supplying states in a self refresh mode. In the self refresh mode, only self refresh-related circuitry receives a power supply voltage to perform refresh operation. A reduced current consumption can be achieved in the self refresh mode while fast access operation is not deteriorated.